1. Field of Disclosure
This disclosure relates generally to level shifting circuits, and in particular to level shifting circuits with increased voltage ranges and reduced insertion delays.
2. Background
In various electronic devices, integrated circuits operating at low supply voltages are interfaced with electronic circuits operating at higher supply voltages. For example, a chip set operating at a first core voltage level (VddL), for example at 0.7 V, can interface with a memory device operating at a higher voltage level (VddH), for example at 1.4 V. In such cases, a level shifting circuit (“level shifter”) can be employed to maintain communication between circuits of different supply voltage levels.
Conventional level shifting circuits operate satisfactorily at low voltage ranges, but can fail at low VddL values and wider voltage ranges. In addition, the insertion delay of a level shifting circuit may become unacceptably large. Thus, the development of level shifters operating over relatively wider voltage ranges with reduced insertion delays is desirable.